The Implementations Of Lte Physical Layer Based On Fpga

LTE is the4G technology based on the beyond3G technology,and is able to further improve and enhance the existing3G technologies,and to meet the challenges of the WiMax, mobile broadband wireless access technology.In order to improve the competitiveness of3G in the emerging broadband wireless access market.With the rapid development of mobile communication technology and in recent years launched a commercial network based on HSPA, LTE has caused more and more attention. Because LTE technology can greatly enhance the data transfer rate, therefore, obtained the general operators support.The FPGA has the advantages of highly flexible and integrated architectures,and could be applicable to a wide range applications.The technology is compatible with the advantages of the PLD, and the common gate array can achieve large-scale circuit, the programming is also very flexible.Compared with other ASIC gate array, etc., it has a design and development cycle is short, the design and manufacture of low-cost, advanced development tools, the technology is widely used in the prototype design and production of the product.First, this paper introduces the background of the development of LTE, the research present situation and significance.Then analyzed the physical LTE descending the processing of the link, and channel coding and baseband signal generation. Among them, the generation part of the baseband signal to do a detailed study provides a theoretical basis for the implementation of key technologies in the following part of the baseband signal.Subsequently, the paper discusses the pseudo-random sequence generation and spatial multiplexing precoding processing optimization algorithm, and compared with the conventional algorithm, reflecting the advantage of the algorithm. Among them, focus on the space reuse precoding techniques, according to the sending and receiving ends are stored in the same codebook,put forward a kind of precoding realize the look-up table algorithm. The value of the algorithm is to greatly reduce the sectors of precoding plural number of matrix multiplication, and to simplify the coding processing complexity, can enhance the coding speed.Finally, this paper discusses the platform based on FPGA scrambling, modulation, layer mapping, precoding scheme.The implementation uses a modular design, divided into some sub-modules for each of the technical aspects.And for each child modules of the system and method are discussed in detail. Then simulate and test the four technology module. The simulation software is Altera company Quartus software, occupied by the simulation waveform diagram and hardware resources, test the4function module can meet the requirements of the system.