Behavioral Modeling And Simulation Of Pipeline ADC

Today, the development of LSI has become the trend of modern circuit design, and thesedevelopments bring a great deal of challenge to the circuit design ,especially a significant increasein design costs and design time, therefore we have to consider how to improve the design efficiencymore effective in the design phase. In general, we can use the simulation tools for most of theanalog circuit or hybrid circuit simulation such as Spice, Cadence, etc, which have proved to bevery useful for circuit analysis software. However, these simulation tools also presents significantlimitations for increasing circuit size and complexity, because these simulation tools in atransistor-level simulation requires a lot of time, which leads inevitably to a lower design efficiencyand the increase in the cost of time. To this end the researchers used the idea of the digital IC-leveldesign, and proposed the establishment of a behavioral model to shorten the time and this has alsoproved to be a very effective way.The main content of this paper is the behavioral modeling and simulation of pipelined ADC.First of all, we understand the composition of the pipelined ADC and analyze the basic unit of thepipelined ADC: Sample and hold circuit(S/H),the sub-ADC circuit, the MDAC circuit and digitalcorrection circuit. Then understand the basic principles of the various component units and modelthe cells in which play a key role. Opamp is the most fundamental and important building blocks inthe sample and hold circuit and MDAC circuit, so precision opamp model largely determines theaccuracy of ADC behavioral simulation. For the sub-ADC circuit, the comparator is one of the keycircuits, here is the high-speed comparator that is pre-amplification latched comparator.Pre-amplifier is equivalent to an open-loop opamp and we are modeling pre-amplifier circuit andlatch circuit. For digital circuits such as digital correction circuit, we use an ideal model to replacedue to the strong anti-interference ability of the advantages of digital circuits.Finally, the actual circuit and the model are verified the correctness of the model. Thesimulation results show that the model can well reflect the characteristics of the circuit. As thesimulation time of the model takes shorter than the original transistor-level simulation, which canprovide greater efficiency when designing the circuit. Through the establishment of more accuratemodels can be very helpful in the follow-up design.The proposed model can well reflect the work of circuit, therefore is great significance for thepipelined ADC design.