Study On Hot Carrier Effects Of Nanometer CMOS Devices

As the scaling of technology nodes of integrated circuits, the problem of device reliability has become more and more important and has become the limit of device lifetime. The main problems of reliability in nanometer CMOS devices include hot carrier injection (HCI), negative bias temperature instability (NBTI) and time dependent dielectric breakdown (TDDB) et al. To achieve the development of ultra-large scale integrated circuits and solve the problems of the semiconductor devices and circuits, it is essential to study on these reliability mechanisms and to find the problems of current stage.This paper researches on the hot carrier injection (HCI) effect which is one of the most important concerns in the nanometer device reliability. Using devices of nMOSFET and pMOSFET with technology nodes from0.35μm to45nm, a series of HCI degradation experiments are carried out, and the HCI mechanism and lifetime prediction model of different technology nodes are studied. The main results have:1. The worst stress voltage condition and temperature condition of nMOSFET and pMOSFET are achieved respectively using devices of different technologies nodes from0.35μm to45nm. And the results are used as the reference for actual device lifetime prediction.2. With the hot carrier degradation experiments and the lucky electron model the HCI lifetime is obtained for45nm technology node.3. Samples with45nm standard process technologies are used. HCI degradation with different temperatures, voltages and lengths are investigated and the comprehensive HCI lifetime prediction model of45nm technology node is obtained. Using the model, the lifetime of devices with any channel length, operation voltage and temperature can be predicted.