Research And Application Of Boundary Scan-based Board-level Testing Method

This paper focuses on the research of the application of boundary scan method in a board testing of the digital system. With the analysis of the measurability in digital circuit, the paper discusses the advantages of improving the electric testability design of the boundary scan method, gives the specific process of the fault detection and diagnosis in circuit test with the scan testing method. Furthermore, this paper analyzes and researches the scanning unit in chip as well as the TAP controller in scan testing, registers, BSDL files and the common instructions in scan testing. Also, the paper combines the research of boundary scan method, puts forward several collocation method in bus testing, provides the actual application of the boundary scan method in a board testing and has obtained the ideal reports of the testing coverage.First, through the analysis of the electric testability and the SCOAP regulation measure, the paper illustrates the controllability and visible algorithm of the network in the electric board test. On the premise of the testability measure, it proposes the better method of the electric testability design, namely the boundary scanning test method of this paper, analyzes the advantages in the board scanning test of the fault detection.Second, by the research of boundary scanning technology, this paper simulates the signal loading of the scanning unit in test and collecting method, the working condition of the TAP controller during the testing and the related operations of registers. Also, the relevant mathematics models of the basic fault types in board test are established, the various kinds of the fault diagnosis and the testing process the boundary scanning in board test are analyzed in detail. In addition, the paper has studied the IC interconnect test and logical test between IC in the boards.Finally, combined with the earlier testability design and the theory research between circuit board test, the paper establishes the demo board as a model and has finished a test program with the relating information, and then spreads the actual engineering test, detects the effect of the common fault in the model scanning test which based on some artificial sets. In the end, the whole coverage rate between circuit board test are supplied.