Hardware Implementation Of Block Ciphers Algorithm Based On Petri Net

This subject comes from tutor's research subject "Hardware implementation of block ciphers algorithm based on petri net" which comes from National Natural Science Foundation project "Properties of unique reachable vector net system and research for its application in information security technology" which was in the charge of Wu Zhehui professor, the project number is:60673053/F020301.Wu Zhehui professor presented "A kind of block ciphers system based on petri net" in this subject, and provided software code for this algorithm. Through testing, the time computing substitution tab is 3470ms in NiosⅡ/f microprocessor platform running uClinux OS which clock freqency is 100MHz, icache is 4Kbytes and dcache is 2Kbytes, incidence matrix is 4x6, L1 is 1, L2 is 7, and this time is very long in real application. Basing on software code, this subject improved the block ciphers algorithm from hardware implementation of view in the case that it did't decrease block ciphers algorithm security performance, and provided hardware implementation in the form of reusable IP core.This paper accounted the hardware implementation process and details of block ciphers algorithm based on petri net.Firstly, introducted the concepts of petri net; analysed block ciphers algorithm based on petri net; described software implementation details and made improvement for this algorithm; secondly, divided algorithm hardware implementation into some parts which are as follows:(1)petri net running module, this module computes one Mx's all of valid next level reachable markings;(2)RAM module, this module is responsible for large data store; (3)substitution tab generation module, this module computes certain number of valid reachable markings,sorts these reachable markings through catercorner order and index orde,generates substitution tab using FSM(Finite State Machine);(4)hardware DMA module, It executes substution operation using hardware DMA;(5)Avalon bus interface, we package whole hardware module an avalon bus interface IP core. Finally, we tested for algorithm hardware implementation, the result turned out that the hardware execution speed was about 209 times of pure software execution when doing large data encryption and decryption. Innovative points of this paper are as follows:(1)It improved the block ciphers algorithm based on petri net from the hardware implementation of view;(2)It realized hardware code for the block ciphers algorithm based on petri net.(3)It packaged whole hardware module an avalon bus interface IP core.