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Photodiode Integrated In A 0.35¦Ìm Cmos Process And Optimization

Posted on:2010-01-12Degree:MasterType:Thesis
Country:ChinaCandidate:L P WangFull Text:PDF
GTID:2208360275492133Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Today in the rapid development of integrated circuits,with the enhancement of integrated circuit manufacturing processes,the level of system integration is getting higher and higher.Today we have single-chip solutions for many circuit applications which should be built with multi-ICs in the past.Single-chip system,i.e.,system on a chip(SOC),has become the most popular direction of IC industry,which in turn stimulates the promotion of new demands of the development of IC manufacturing technology.This thesis investigates the integration of photodiode into a CMOS circuit by standard CMOS process.According to the demand of products,the photodiode must be sensitive to red light,and have a certain degree requirements on the response time and noise.From the request above,before setting up the process,firstly this thesis theoretically identified the model of the photodiode.According to the model of photodiode we can roughly set the process conditions such as the substrate and PN junction depth etc.Then,under the rough conditions and for the most complex device structures,we first developed a more complex process.Through processing the wafers,first we verify that the given design specification is appropriate after testing a special test structure.Secondly,we test ordinary CMOS devices to prove that they perform well and are not influenced by the photodiode process.Finally,by testing the photodiode we prove that a simple structure can also well meet the design requirements.Finally,to aim at the simple structure the process is simplified and improved.As a result,the added five lithography processes in the former are cut down to only one,which greatly reduced the cost of the process and enhance its competitiveness in the market.We find the errors of design and the irrationality of the design rules through the FA measure.After solving these problems,wafer'processing succeeds.By partial pulling experiments, we further confirm that this certain process has a large process margin and is very stable,which means the process flow is good and inexpensive.
Keywords/Search Tags:Photodiode, CMOS, PN junction
PDF Full Text Request
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