Usb2.0 Otg Based On Linux IP Core Research And Implementation Of Host Drive

USB is widely used in wired communication area, but the USB interface does not support direct communication between two peripherals generally. With the release of OTG supplement, this problem is resolved. The USB OTG dual device which support OTG supplement can be either host or device, so the direct communication between two dual devices can be achieved. This paper introduces USB2.0 OTG IP core based on ARM. And it is mainly about the design of the Host Controller Driver based on Linux.The USB2.0 OTG IP core supports USB2.0 specification, OTG supplement, and UTMI+ specification. This IP core is located between the memory controller of ARM and the PHY which designed to communicate with USB device. The USB2.0 OTG IP core mainly includes OTG Controller, Enhanced Host Controller, Open Host Controller and Device Controller. This IP core has following specialties. First this IP contains OTG controller, and it contains both full-speed and high-speed host controller which is a unique design. Second this IP, which does not have the bus control capability, is independent with MCU, and data transfer between its buffer and MCU is achieved through the interrupt which initiated by the IP core.USB Host function is implemented by USB Host Controller and USB Host Driver. USB Host Driver is complex software architecture. It contains several layers which are USB Device Class Driver, USB core, and Host Controller Driver. HCD, which is researched deeply in this paper, is the communication channel between USB driver above and host controller bellow. HCD mainly manages the HC, data transfer, the USB device, and so on.Before developing of the USB HCD, the driver designer has to analyze the USB protocol stack integrated in Linux operating system, and then build USB driver architecture. Then the driver designer can implement USB full-speed and high speed HCD based on Linux according to the IP hardware design and the interface between the IP and ARM. Because of the specialties of the IP design, driver designer should consider the route switch between the high-speed and the full speed controller, access to shared buffer, and the mode of ARM accessing the IP core as a slave. Finally run this driver as a module in Linux kernel on the ARM test board and test.This IP core implement the Mass Storage function of the full-speed and high-speed host controller, and can switch between them successfully.