On-chip Network Mapping Algorithm Research And Design

NoC is a complete architecture for designing large parallel computing system, which is dedicated to provide a better option to design the large scale design which the SoC design architecture can hardly catch up nowadays. NoC is a technology of micro-network, which is based on the computer communication network's thesis and design. NoC is divided into different design sections, which involve the design of physical section, data link section, network section and application section as well. NoC facilitate the modeling of computing resource, standardization of interface and reusability of IP cores. The most valuable underlying network topology is the 2DMesh network, which is simple and easy to scale up. In most cases, a certain NoC system is designed for a specific application, which is consisted of many IP cores. Different ways of mapping the IP cores to the underlying topology lead to different overall system performance and energy consumption. To find an optimal mapping of application to 2DMesh network, a model which describes the application must be found.This paper analyzes the topology and routing algorithm for 2DMesh network, the proposed mapping algorithm takes advantage of parallel characteristics of the NoC application to manage the complete mapping of the application to the underlying network. In this paper, CDCG is organized into data structure and a method which is intended to produce a CDCG object is given, and CDCM is validated on fixed mapping. CDCG is used as input to the mapping algorithm, which is based on the brand and bound searching technique. The mapping algorithm calculates the system parameters under the CDCG way. The test result validates the effectiveness and the efficiency of the mapping algorithm. This paper is dedicated to the following contents:1. The modeling for the application of NoC2. Topology of 2DMesh and its routing strategies3. Mapping algorithm design for 2DMesh network...