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Based On Fpga-controlled Double-tuned Filter And Design

Posted on:2009-09-24Degree:MasterType:Thesis
Country:ChinaCandidate:T P ShenFull Text:PDF
GTID:2208360245478946Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the unceasing enlargement of the scale of power system and the wide use of various power electronic installations, harmonic pollution is becoming increasingly serious. General tuned filter is widely used in harmonic suppression recently, but the general tuned filter is rather sensitive to parameters changes of filter and power network characteristic. Thus, It cannot work well with the affected performance. This paper applies the controllable reactor to construct controllable double-tuned filter which makes up for the shortcomings of traditional passive filter, tracks harmonic and suppresses harmonic. However, it is faced with the problem of real-time and accurate detection of the harmonic of filter's spur track. In recent years, with the rapid development of ultra-large-scale and high-speed programmable logic devices FPGA with advantages as high level of integration, high-speed, programmable and so on, FPGA is widely used in high-speed signal processing and real-time monitoring. This paper uses FPGA to realize the FFT algorithm and designs a FPGA-based system to complete harmonic detection and to complete harmonic suppression with the controllable double-tuned filter.This paper proposes the FPGA-based controllable double-tuned filter design according to needs from harmonic detection and suppression. This paper focuses on the design of FPGA-based harmonic detection system which uses 6 16-bit high speed A/D switches to synchronously sample the multi-channel harmonic signals high speedily and accurately. The design of FPGA uses the modular concept, takes Xilinx ISE as the software platform, employs Verilog and the IP core method and uses the simulation tool of ModelSim to perform the timing simulation. It only takes 69.1μs to complete 1024 bit the radix-4 FFT. The relative error of harmonic amplitude and phase are less than 1.2%. Based on this, simulation circuit of controllable double-tuned filter is constructed in PSCAD and parameters variation of parts and fluctuation of power frequency are set to confirm the validity of controllable double-tuned filter.
Keywords/Search Tags:Harmonic detection, Harmonic suppression, FPGA, Controllable reactor, Double-tuned filter
PDF Full Text Request
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