Integrated High-performance Op Amps Drive The Tft-lcd Design And Research

With the rapid development of FPD (Flatten Panel Display) and the cooperation in the industry from top to down, the LCD's driver IC is in great demand. To meet the increasing market requirement, a TFT-LCD driver with rail-to-rail op-amp is designed in this dissertation. It is based on UMC 0.6μm BCD process. The main part of the driver is a boost converter using peak-current mode with input voltage range from 1.8V to 5.5V, while output voltage can be set from 4.5V to 13V. Programmable soft-start limits inrush current during startup. Under voltage lockout guarantees no mistake occurs when the supply is low. Skip cycle mode ensures a good precision for output voltage in light load condition. The op-amp is design for driving LCD's backplane, it features 9.5V/μs slew rate and±150mA output current, and its rail-to-rail I/O characteristic and a wide bandwidth of 10MHz maximizes system flexibility. The whole chip can operate from -40℃to 85℃. It is well suited for LCD Monitor and notebook displays.In this thesis, basic topology and some key principles of the boost converter and the theory for op-amp design were given firstly. Then, the whole chip diagram was proposed according to the design specification. Based on the whole chip function requirements, sub-block design and simulation were completed. Author paid particular attention to the analysis of the whole chip architecture and the design of the following sub-circuits: rail-to-rail op-amp, softstart, PWM comparator and UVLO. At last, the whole chip function simulation and typical performance characteristics simulation were presented. In the conclusion of this thesis, the research value of this circuit was pointed out, but it was suggested that corner simulation and post-layout simulation should be indispensable.This thesis is a production of circuit principles and simulation practice. Based on the circuit principle analysis, the author simulated the sub-block circuits and the whole chip circuit by HSPICE. The simulation results indicated that the IC has achieved the expectation and the circuit principle analysis has been verified.