The Comint The High-speed Digital Signal Processing Board Development,

The basic task of communication signal reconnaissance is to analyze the intercepted signals from the reconnaissance system. The intercepted signals are uaually in passive states, with broad bandwidth, multiple modulation modes and signal components. The communication reconnaissance system often uses broadband receiver, with high-speed sampling rate to adapt to different bit-rate and modulation mode; then more complex signal processing methods are implemented in demodulation. Therefore, the signal processing systems used for communication signal reconnaissance not noly have to meet the requirement of massive computation, but also require parallel processing capability to ensure the reconnaissance system's real-time performance.Based on the analysis of characteristics of communication signal reconnaissance, this thesis presents a scheme for using high performance parallel DSP processors to design a digital signal processing board, which also has an intermediate frequency (IF) sampling module, a large-capacity data memory module and a high-speed data transmission module. The board chooses two ADSP TS201S (TigerSHARC),one kind of the most powerful floating-point DSP processors,as its core signal processing module, between which the interconnect communication is implemented both through external port and link ports. In this thesis, the entire hardware design of the signal processing board is realized, then the developing of the communication signal reconnaissance system is mainly introduced. Finally, the results of the hardware test and the system experimentation indicate that, the borad can be applied to real-time signal processing of communication reconnaissance system.The main contents of the thesis are presented as follows:1.Main characteristics of communication signal reconnaissance are studied, and then the scheme of the digital signal processing board is designed.2.The hardware design for the board is discussed detailly and deeply, including dual-DSP, ADC, USB interface, FPGA, and much more about board-level logic circuit design. In addition, schematic diagram design and PCB layout design are involved in the hardware design. 3.The hardware debugging and test is implemented in the end of hardware design. After that, a frequency-scanning program to controle the analog receiver is designed and the system experimentation of communication signal reconnaissance based on another parallel DSP signal processing platform is proposed.