Design And Implementation Of High-performance Floating-point Division And Square Root

High-Precision Computing, Graphic Acceleration, Digital Signal Processing and other applications require further improvements of floating-point processing. Therefore, Floating Point Unit has become one of the most important components in current microprocessors. As the technological advancement of Integrated Circuit has been consistently improving the integration scale, research on improving the performance of FPU has become a key topic.This thesis is part of the National Defense Preliminary Research Project (Project number: 41308010108) in the 10^th Five Year National Plan undertaken by the Aviation Microelectronics Center in Northwestern Polytechnical University. The LongTium R2 microprocessor is completely compatible with PowerPC750 in interface and instruction sets. This paper mainly discuses the design and implementation of division and square root operation. This paper,1. Analyses the several current division algorism, including Newton_Rapheson, Goldschmidt, SRT, and High-Radix SRT, and later compares them in speed, power consumption and area. After that, the plan for division operation in LongTium R2 was proposed.2. On the basis of previous study, analysis the principle and implementation of realizing the square root computation in iterative ways, and decides to employ the base-4 algorithm in the square root computation.3. Finalizes the data path design of FPU, implements the division and square root operation, with the key path less than 4.29ns.4. Finalizes the control path design of FPU, including decoding of 51 instructions, pipeline design, handling of data relevance and execution as well as rounding.5. Tests and verifies the floating point unit in direct and random methods, with 100% functional coverage and code coverage.The LongTium R2 has successfully run the small/big monitoring programs,floating point testing program and the VxWorks. With standard CMOS cell library in SMIC 0.18um, the syr,.hesis results show that the FPU key path is less than 4.29ns, which satisfies the requirements of the main frequency of 233MHz of LongTium R2. The research work discussed in this paper provides important reference and experiences for designing future high-perforamcne embedded microprocessors with own Intellectual Property Rights.