Based On The High-speed Forwarding Of IPv6 Router Technology Research And Implementation

The high performance IPv6 router plays an essential role in IPv6 backbone network, and for its design, forwarding engine is one of the key points which primarily limits the performance. This dissertation is based on the 863 IPv6 router project, and mainly devoted to the researche of the ipv6 forwarding engine from the points of theory study and implementation technologies. The main work of this dissertation is as follows:Based on an indepth study of IPv6 forwarding process, a forwarding engine structure called Parallel Pipeline High-speed Forwarding Engine Based on FPGA is presented. Combining with the bottleneck analysis of the structure, we furtherly design a segmental routing look-up pipeline in favor of eliminating the lookup bottleneck. The lookup pipeline greatly improves the efficency of the forwarding engine by decreasing lookup time from 10 cycles to 2 or 4 cycles. The test performance report of the structure demonstrates that this forwarding engine can support two 2.5G ports forwarding IPv6 packets at line-speed.The ipv6 forwarding synchronous pipeline is presented, and some key parameters of the pipeline such as frequency, throughput and efficiency are given. The analysis model of the pipeline entrance's memory demand is established, with this model, the memory demand is studied from two pipeline status: open status and shut status, Moreover, the maximum demand and the mean number of memory demand are given. These results afford a good reference for engineering design.The ipv6 multicast is overviewed. Forwarding multicast packet at line-speed will meet some problems, which are obtained by summarizing the multicast forwarding process for PIM protocol and analyzing the implementation of multicast forwarding table look-up. To solve these problems, a scheme called PPMFS(Parallel and Pipeline Multicast Forwarding Scheme Based on the Method of Double Entry Placed Together) is presented. Analysis and experiment prove that the performance of the forwarding engine with PPMFS can reach 31.25Mpps forwarding rate and support two OC-48 interfaces forwarding multicast packet at line-speed.High-speed forwarding engine is one of the key technologies of core router. A study of forwarding performance bottleneck is made from three aspects, the restriction of electronic elements speed, the demand of transport bandwidth and the key segment of pipeline Some considerations covered by its design are also given in the paper. These works will be valuable for the following terabit router project.