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Concatenated Code And Fpga Implementation Of The Algorithm

Posted on:2006-07-06Degree:MasterType:Thesis
Country:ChinaCandidate:Y LiuFull Text:PDF
GTID:2208360152497174Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
The concatenated code has been widely used in many fields, suchas DVB and the system of data storage because of its strong abilityof error correction. And it is also used as the error correction codein the first scheme of physical layer in the protocol IEEE802.16a ofWMAN. With the development of the DSP and FPGA, it is becoming moreand more easy to implement the error correction code on the differentgeneral hardware platform. The main content of this thesis is todescribe the implementation of algorithm for the error correction codein the physical layer of the protocol IEEE802.16a.In the first chapter, the author introduces the development andapplication of the WMAN, then describes the function and developmentof the channel codes, and the character and application of FPGA .Atlast the main task of the author is also given.In the section chapter, at first the author describes thestructure of IEEE802.16 protocol suite, then gives the concretecontents of the protocol of IEEE802.16a and at lst, introduces itsMAC layer and physical layer in details.From the third chapter to the fifth, the author introduces thedetails of algorithms for the reed-solomon code ,interleaving andthe convolutional code and discusses the implementation of thesoftware structure based on FPGA. At the same time, the final resultof simulation is given and it is also the main part of this thesis.
Keywords/Search Tags:WMAN, IEEE802.16a, Reed-Solomon Codes, Convolutional Codes, interleaving, Viterbi, Berlekamp-Massey, FORNEY, Chien-search
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