Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing has become a subject of a great deal of research. Its key feature is the ability to perform computations in hardware to increase performance, while retaining much of the flexibility of a software solution. In this survey we explore the hardware aspects of reconfigurable computing machines, from single chip architecture to multichip systems, including internal structure and external coupling. We also discuss the software that targets these machines, such as system function calls and related high-level language coding.The target of our research is to build a static reconfigurable computing machine based on industrial X86 PC, which is aimed to realize high-performance image-processing computing in a traditional low-performance PC environment.A co-processor-unit has been implemented for convolution in image processing coupled with host with ISA, which is directly accessed by system function call. With the reconfigurable computing systems, the time of convolution processing is reduced to a fortieth of the computing on common PC versus without of it. |