Ethernet 10base-t To E1 Interface Hardware Design And Realization

This paper accomplishes the E1-LAN netbridge utilizing the E1 line of the Telecom for the LAN interconnecting. The subject is based on a certain company's project THE TRANSMISSION OF ETHERNET 10BASE-T TO E1 INTERFACE, which may change the rate of interface according to the various situations and be easily controlled. The system can accomplish the data transmission of ethernet through E1 line. The data process is: Manchester decoding, rate changing, HDLC link coding, HDB3 coding, then through the E1 line trasmission. The received data through the negtive process is changed into ethernet data and enters the 10BASE-T interface. The paper is dealt with the basic knowledge, the recent situation, the standard and the related theories of ethernet LAN and E1 WAN transmission, then emphasizes on the structure, the special chips and the FPGA used. The FPGA programs writing, debugging and simulation are based on such analysis and introduction. Finally, the circuit board is designed and the hardware debug is performed.The author's main tasks includes:1. Discover the possibility of transimission of ethernet 10BASE-T to E1 and get good control of ethernet, the way that E1 works and interface model.2. Get good control of characters and usage of related chips.3. Master FPGA and its programming, simulation and download tools4. Write the programs of interface HDB3's coding and decoding, debug and simulate.5. Design the Printed circuit board and accomplish the debugging.