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.1750 A System Input And Output Control And Self-test Program

Posted on:2002-03-15Degree:MasterType:Thesis
Country:ChinaCandidate:J H LiFull Text:PDF
GTID:2208360032453925Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
This paper focuses on the IP design of 1752,mainly on the I/O control and built-in self test of the 1750A system. The 1750A research group finally accomplishes the design of the 1750A system. This paper uses the advanced HLD(high level design) method and IP(Intellectual Property) design technique, describes the chip and accomplished the system post-simulation of 1750A system. The paper also accomplished the full-test on the 1750A test plat provided by the 631 institute. The key of the system design is the analysis of the architecture of 1750A system. Based on the analysis and study of the architecture, this paper elaborates the design of the 1752. This paper, on the other hand, discusses the high level design method, while implementing the architecture design at the same time. Since the basis of HLD is the hardware description language, this paper also does some research on the description method and style according to the design of the chip. Based on collecting and analyzing lots of material, l75OA research group uses other successful mode as reference, introduces top-down design strategy, design reuse and JP design technique, and finally accomplishes the logic design of the l75OA system with our own copyright independently.
Keywords/Search Tags:I/O control, architecture, high level design, hardware description language, IP, FPGA
PDF Full Text Request
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