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The Research And Implementation Of Dpa-resistant Standard Cells And Encryption Arithmetic

Posted on:2011-10-21Degree:MasterType:Thesis
Country:ChinaCandidate:J WuFull Text:PDF
GTID:2178360308485671Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Accompany With the coming of the information age, Information security has become a part of life which can not be ignored. The emergence of Side Channel Attacks has been a great threat to information security. In order to protect the security of information better, preventing the attacker to attack the security chip,the design of security chip which can resist Side Channel Attacks has been hot topic of research.Based on the deeply study of the power analysis attacks technology on security chip, The writer of this paper introduces a new constant power logic which is named LBDL(LUT Based Differential Logic). By using the improved process of building standard cell library,the writer designs and implements the LBDL standard cell library in 0.13μm CMOS by full custom . Finally based on the standard cell library,the writer design and implement the cryptographic algorithms AES which resist power analysis attacks by semi-custom. In order to make the AES module hasing a better balance of power performance, the differential routing method has been used in the implementation process.The Main contribution and innovative points of this paper are given in the following.1,Introduction of a new constant power logic which is named LBDL. Like other dual pre-charge logic, this logic has constant turn rate. It also eliminates the correlation between the turning point of output port and input data values. By referencing with the pre-charge behavior of WDDL(Wave Dynamic Differential Logic) logic, the LBDL logic set up the values of complementary input signals in cells, in order to control the pre-charge and evaluation behaviors of the cells. This design solves the routing problem of pre-charge clock signal.2,Full-custom implementation of the LBDL standard cell library. The cells in this library are composed by two LBDL logics which are dual track logics. During the design process, the writer need to merge the logic and opposite logic of itself. This makes the area of the cell becoming twice the size of the single logic. In addition, in order to support the differential routing, the PIN on the standard cell has been placed specially.3,Application of differential routing which can balance capacitive load of output ports. In order to resist power analysis attacks , the chip's power consumption must be balanced, then it eliminates the correlation between the turning point of output port and input data value. But only to eliminate the correlation within the elements is not enough, in order to make the chip resist power analysis attacks better, the differential ports must have the same capacitive load. This requires two differential output ports hasing the same routing.4,Semi-custom implementation of the cryptographic algorithms AES which resist power analysis attacks. In order to analyze the resistance performance of chip, this writer semi-custom implements AES by using the LBDL standard cell library.
Keywords/Search Tags:Security Chip, LBDL, Power Analysis Attacks Technology, Full-custom Design, Standard Cell Library, Semi-custom Design
PDF Full Text Request
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