9 Bit 10MS/s Low Power Pipeline ADC Design

The low price of CMOS image sensor has attracted many people's attention,because it is compatible with VLSI. As the ceaseless development of CMOStechnology, the CMOS image sensor has achieve a great progress, and it has had theabilitytochallengetheplaceofCCDinmarket.Because the CMOS image sensor can integrate with other circuit, the sensorand image processing circuits can be fabricated in the same wafer. Among the imageprocessing circuits, ADCs play a very important part. It is the interface circuit ofsensor, and converts the analog signal to digital code. So the design of ADC is veryimportantforthewholedesign.In the paper, a low power, 9bit and 10MS/s pipeline ADC has been designed,which is used in 30,000 pixels CMOS image sensor. It has five stages, and the fourstages in front output 2.5bit digital code, and the last stage output 0.5bit. The designrequires thelowpower,sothereseveral methods havebeenadopted. First,thecurrentof amplifiers and comparators has been decreased. Second, all the amplifiers andcomparators use the same bias circuit to reduce the power. Third, adopt the simplestructure for amplifier. Fourth, use the capacitor array to implement DAC function,reducethedigitalcircuits.Fifth,becauseitisusedinCMOSimagesensorandinfrontofADCthereisaDPGAcircuit,itdoesn'tneedanS/Hcircuit.Itreduces muchpower.Thedesignalsoemploysthedigitalcorrectiontechniquetoimprovetheresult...