Design And Implementation Of Multi-platform PCI Bus Interface

This topic comes from a research project undertaken by professor Lu Xiaochun Design and implementation of the Receiver Subsystem of Time-Synchronization Payload System Among Aircrafts . This receiver subsystem is mainly used for receiving time comparing signal, requiring up to tens of megabytes of transmission rate. PCI[1] (Peripheral Component Interconnect) bus is the interconnection interface beween micro-processor/memory and peripheral control components. PCI bus can support 32-bit / 64-bit data transmission, with the maximum rate of up to 264MB/s and a complete bus protocol, fully meeting the requirements of high-speed data transmission for receiver subsystem.In this paper, PCI interface design and implementation based on multi-plateform is completed on the basis of PCI bus protocol. The paper begins to introduce the principle of device drivers for Windows 2000 operating system, and the programming of PCI bus driver is done under Windows environment. In the second section, the design concept of PCI device drivers under Linux operating system is analyzed, and the programming of each driver module is completed consequently. The third part of this paper presents some hardware and software methods for designing PCI interface on SOPC. In the last section PLX's Universal interface chip PCI9054 is chosen to verify the PCI driver under the Windows system. In this part we take the Windows 2000 as an operating system to design function test program. A joint debugging of function test program, PCI driver program and PCI function development board is done based on this platform, results show the reasonability and practical utility of the design for driver program and hardware development board.