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Design Of Radar Signal Preprocessor Based On FPGA

Posted on:2011-09-27Degree:MasterType:Thesis
Country:ChinaCandidate:Y G LiuFull Text:PDF
GTID:2178360302999423Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
With the rapid growth of China's national economy and internal and external trade volume increasing, shipping becomes more and more prosperous. Radar signal processing is a key technology for navigation radar detecting target, which improves the radar detection capability and has a crucial role for safe and efficient shipping. Radar signal preprocessing system is mainly responsible for the radar echo signal acquisition and processing a series of clutter. It demands a very high real-time. The development of Very Large Scale Integration(VLSI) technology, especially the appearance of very large-scale programmable logic device bring the digitized processing of radar signal a new break-through.This thesis, depriving from the basic Sci & Tech researching project of "the research of digital processing method of intermediate frequency signal for marine radar" supported by the Ministry of Communication. Based on high-speed and real-time requirements of Radar signal processing. the issue designe and implement a digital radar signal pre-processor in the FPGA. Based on real-time data processing capability features of FPGA, we can break the bottleneck that the radar signal data acquisiting speed and the data processing speed can not match in the past. The system designed in this article is working on the high sampling rate.By verilog HDL language system implementation to realize thus realizes flexible control, improves the design flexibility, compatibility, upgrading ability, and has shortened research and development cycle.The paper discusses the design of the system hardware platform, and focus on the key technology of the designation of radar signal processing of CFAR (constant false-alarm rate), and probes into the FPGA design problem of optimization, after the test and analysis summarizes the research achievements. Experimental results show that the general hardware processing platform, which based on high quality FPGA adopting the optimization of CFAR processing method can greatly improve the speed and precision of the radar clutter procession, and this paper realized the radar signal pre-treatment system based on FPGA During the concrete course of the design, first to synthesize and optimize and then simulate and verify,at last download and implement each functional module via the Synplify Pro,Modelsim facility and the integrate software development environment of the ISE. Every result declares that the digital radar signal pre-processor designed in this paper reached the demand of expected design goals.
Keywords/Search Tags:Radar Signal, Pre-process, FPGA, CFAR
PDF Full Text Request
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