Research And Implementation Of Automatic MPSOC Task Parallelization Specified For Multimedia Encoding And Decoding

Multi-processor System on Chip has become the attractive topic and hotspot in VLSI(Very Large Scale Integrated Circuits) research in recent years due to its merits of high performance, parallelized processing and flexible programmability. The development of research on MPSOC design flow has brought big challenges and opportunities to the software/hardware designers and system developers.The topic about task partition, task mapping and task scheduling has an impact on the implementation of the MPSOC software/hardware architecture. This research topic has such a great influence on the whole performance that it has been a key problem to be solved in the MPSOC design. This thesis proposes a method to solve the problem about how to design effective algorithms to guide the task partition, mapping and scheduling, and to achieve the goal of automatic exploration in architecture design space.The main contribution of the thesis is to address the issue of automatic task-level parallelization for the architecture of MPSOC and to give the system implementation. This thesis proposes a method to parallelize the application which is modeled by Simulink CAAM to explore task-level parallelism. The method firstly uses the extended annotated hierarchical task graph to model the task parallelization problem, and studies on the partition method based on the new graph model, then proposes a two phase mapping scheme for iterative computation and uncertain-execution-path task, that is, after obtaining the initial solution, the scheme uses intelligent algorithm according to the cost function to adjust the mapping result and eventually to get an approximate optimal solution, and at last, the method uses the scheduling algorithm compatible with conditional task and general task based on the mapping result, and finally generates the multithread codes which contain the parallelization information.The thesis gives an introduction to the system implementation of the proposed method and uses simulation and experimentation results to demonstrate that the proposed research solution could effectively improve the performance and achieve the goal of task partition, mapping and scheduling in the exploration of MPSOC design space.