Study And Implementation Of LDPC Code Encoding And Decoding Algorithm In DVB-S2 Standard

Low-Density Parity-Check (LDPC) codes are linear block codes defined by sparse parity-check matrix. LDPC codes have bright prospects because the decoding performance of LDPC codes has been shown to approach the Shannon limit. The DVB-S2 (Digital Video Broadcasting- Satellite 2) standard adopted the concatenation of BCH outer code and LDPC inner code as the Forward Error Correction (FEC) subsystem. Therefore, the FEC subsystem of DVB-S2 has powerful correcting ability. This thesis is based on the application of DVB-S2 standard. Firstly, we have made some research on the encoding and decoding algorithms of LDPC codes. Then we have designed and implemented the LDPC codec which is compliants with DVB-S2 standard. Main contributions in this thesis are listed as follows.1. The LDPC encoding algorithm proposed in DVB-S2 standard has been studied. The periodic structure of the LDPC parity-check matrix has also been analyzed. Based on thoughtful analysis of encoding algorithm, we have designed and realized a LDPC encoder which is conforms to DVB-S2 standard. In the designed encoder, we developed an effectively way to store and compute the parity bits and implemented the reconfiguration to support all kinds of code rate by dual-port RAM.2. The BP (Belief Propagation) algorithm and simple algorithms based on BP algorithm have been studied. The difference between SMP (Standard Message Passing) scheduling and RMP (Row Message Passing) scheduling has also been analyzed. A modified LDPC decoding algorithm which integrates RMP and Offset Min-Sum algorithm has been proposed. Simulation results demonstrate that the proposed algorithm does well in trade off the computation complexity and decoding performance, and it also reduces the memory used in quantization implementation.3. Based on the modified decoding algorithm, we have designed and realized a low complexity LDPC decoder which is accords with DVB-S2 standard. As the parallelism factor of DVB-S2 LDPC code is 360, we have proposed a partially parallel architecture in the decoder. When code rate is 9/10 and work frequency is 320MHz, the net throughput of the decoder is 998Mbps, which can meet the requirements of DVB-S2 services. The synthesized area of the decoder is 9.6mm~2 in Chartered 90nm COMS technology and it is fewer than some existing decoders at the same technology.