Design And Verification Of Charge-Pump Phase-Locked Loop Behaivior Model Based On The Analysis Of Jitter

PLLs are used wide1y in electronic systems,and their performance requirement keep growing. Charge-pump PLL is the most popular one in recent years because of its infinite pull-in range,short lock time and zero capture phase errorWe first discussed minutely about the basic principle, analysed the s-domain model,z-domain model and the event-driven model of 3rd order CPPLL detailedly, and then presented the judgement approach of the effective event of the event-driven model, with which the calculation for the no-effective event could be avoided. This was timesaving. In this paper, the disadvantages of these model metioned above were discussed. The relation between jitter and phase noise was available by analyzing the jitter existed in the block of the CPPLL. The synchronous jitter produced by the PFD/CP and divider is well approximated by simple synchronous jitter if one can neglect flicker noise, so as the accumulating jitter produced by the VCO. The simple synchronous jitter and the simple accumulating jitter is Gaussian distribution. The behavior models of PFD/CP,deider and VCO based on jitter were built in Verilog-A and the simulated by Spectre. It showed each block have the function of the transistor level cuicirt. Because of the appearment of the resistance and capacitance of the low pass filter, the transform function was unnecessary, thus it was simple to discribe high order PLLs. Finally, a 3rd order CPPLL with 6MHz input & 48MHz output was designed under the technics of 0.35μm, 3.3V power supply. The comparison of the event- driven model, behavior model and transistor level circuit showed that the event-driven model had lower damp and larger overshot on frequecy. The behavior model was more closed to the transistor level circuit, because the no-ideal factor such as jitter and the current dismatch of the charge pump, were included in this model, which make it the same enviroment as in practice.The behavior model based on jitter proposed in this paper can describe the opration process of the practice PLL, and It was a useful model that can be a tutor for the design of CPPLL.