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Research On Test Generation Of Digital Integrated Circuits Based On ACA And PSO

Posted on:2009-11-23Degree:MasterType:Thesis
Country:ChinaCandidate:Y WangFull Text:PDF
GTID:2178360272979558Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
With the development of the digital integrated circuit, the scale of the integrated circuits becomes more and more large, and the structure becomes more and more complex, which leads to the test generation for digital integrated circuits becoming more and more difficult. In recent years, many bionics algorithms may resolve the combinatorial optimization problem by the fast development of them, and the nature of test generation is a combinatorial optimization problem, thus many bionics algorithms are applied to test generation, for example, Genetic algorithm(GA), Ant colony algorithm(ACA) and Particle swarm optimization (PSO) and so on. Introduction of Bionics algorithms into test generation can reduce complexity of the difficult problem.This dissertation selects the digital integrated circuits as research objects and uses the single stuck-at fault model. Regard increasing the fault coverage and decreasing the test time as goals. On the basis of modification of ACA and PSO and combination of them, ACA-PSO is applied to test generation.Firstly, On the basis of improvement of pheromone updating rule of basic ACA for avoiding to be trapped by local optimization, the improved ACA is applied to test generation of digital circuits, which is compared to the ATPG based on GA, the result demonstrate the efficiency of improving the fault coverage; Secondly, On the basis of improvement of parameter of basic PSO for having better convergence, the improved PSO is applied to test generation of digital circuits, which is compared to the ATPG based on ACA, the result demonstrate the efficiency of improving the test time; Lastly, the new algorithm combining ACA with PSO show the approach not only takes full advantage of utilizing both algorithms, but also overcomes their disadvantages, It can achieve higher fault coverage and shorter test time.
Keywords/Search Tags:Digital integrated circuits, Test generation, Test vector, Ant colony algorithm, Particle swarm optimization
PDF Full Text Request
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