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Research On VLSI Static Power Consuming Optimization Based On IVC Technology

Posted on:2009-03-27Degree:MasterType:Thesis
Country:ChinaCandidate:J G MaFull Text:PDF
GTID:2178360272479557Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
With the development of integration magnitude, Along with the improvements in the technology, leakage power reduction of CMOS circuit became the top challenge in nanometer level. Most circuits is in sleep state for most time like portable devices, so the input vector control(IVC)plays a very important role while dealing with these problems. This thesis is about the IVC technology in leakage power reduction of CMOS circuits. The main contributions are as follows:Firstly, the various ways and approaches of power dissipation reduction are discussed according to power dissipation source, as well as their application in all aspects of design, which adopts the technology in process level,layout level,circuit level,logic level,register transfer level and system level, plus the design strategy to reduce energy consumption while keeping the system performance.Secondly, to optimize the leakage power reduction, there is great need to power estimation for the leakage power reduction model. So some power estimation are illustrated, like Simulation-Based,Non-simulation,the selection of delay model and hierarchical parsing approach. Based on the above, some technology in leakage power reduction are systematically studies, including process control technology,operating voltage controlled method,threshold voltage controlled method,IVC and so on. On this basis, Propsed a Max-leakage estimation approach based on genetic algorithm. IVC technology is the main point of this thesis, and different algorithms for reducing leakage power reduction are analyzed.Finally, an algorithm based on genetic algorithm to solve the MLV of IVC technology is proposed for CMOS leakage power reduction. On one hand, the related work on genetic algorithm for solving MLV are surveyed as well as their improved efficiency in solving MLV and effect for leakage power reduction. On the other hand, the simulated annealing mechanism is applied to genetic algorithm, which solved the problem of premature phenomenon and bad local searching ability in traditional genetic algorithm. The improved genetic algorithm can enhance the performance in searching globally optimal solution and improving the rate of evolution, improve the local optimization ability and get the more optimal solution with guaranteed efficiency. Lastly, to prove the correctness and effectiveness of the algorithm, an experiment is carried out, and from the result, this algorithm reach to the desired effect.
Keywords/Search Tags:input vector control, leakage power reduction, subthreshold current, genetic algorithm, low power
PDF Full Text Request
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