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Implement Of Digital Receiver Of Radar Signals Based On FPGA

Posted on:2009-08-05Degree:MasterType:Thesis
Country:ChinaCandidate:Q WangFull Text:PDF
GTID:2178360272477134Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
In the detecting and intercepting of Radar signals, wideband digital receiving technology is an important trend. Because of its high precision, excellent adaptability and easily-being-integrated, digital signal processing is popularly used in numerous scientific and productive application.At present, the mismatch between the high-speed data flow of the wideband A/D converter and processing capability of the general DSP hinders the digitization of the electronic reconnaissance system most. On the other hand, the wide applications of FPGA afford an available method to resolve such contradiction. Works that have been done in this paper includes the following two parts:The first part particularly introduces the algorithm. The detection of signal is in the first place, after the conversion of the signal from A/D, we apply the algorithm of self-correlation and accumulation to increase the SNR by taking use of the relativity between the signals and the independence between the noises. Through comparing with the detection threshold, the estimated values of signal start point and end point are given. Then comes to the second point—the estimation of the parameters. The algorithm of RIFE is used in the frequency estimation. Through Matlab simulation, the result proves the high quality in the precision and the amount of operation.The second part introduces the hardware's implementation of the algorithm above in FPGA. For the parallel request of the algorithm, we put forward a set of scheme of signal-detection; to decrease the amount of operation, we provide a new method to the self-correlation. Parallel pipeline structure is used to improve the data processing ratio of the system. In the task we adopt the XC4VSX55 as developing platform, which is the prevail serial produced by Xilinx. The test result indicates that the system can work well and the desired requirements can be achieved.In the last part, we present some methods to optimize the VHDL design, which is all about the speed, structure and area.
Keywords/Search Tags:digital receiver, signal detected in real time, estimation of frequency, parallel processing, FPGA
PDF Full Text Request
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