Reseach For Board-to-Board Optical Interconnector Protocol And FPGA Implementation

With the frequency of integrated circuits improving and multi-core's coming,the bottleneck of the traditional high speed electronic interconnect technology is more and more serious.Comparing it,optical interconnector have more merits in high speed area,it is an ideal replacer for electronic interconnector in future.also,it is a hot area in scientific reseach.At present,the Very Short Reach(VSR) protocol suggested by OIF,mainly faced to backbone,its delay,power,compatibility etc.is not suitable for board-to-board,chip-to-chip optical interconnector.So reseaching a appropriate protocol for this is significance.In this paper,the function of the protocol was divided into data link layer and physical layer,the former layer contains protocol primitive sets design,the format of data frame design and data transmit flow design,flow control design,the initial mechanism for the protocol channel design,error detect design,idle character generation design and the manner of clock compensation design;the latter include data serialize and deserializ function,lanes bind function,data coding and decoding etc.Then, FPGA (Field Programmable Gate Array) technology was used to implemented the single channel of the protocol,this paper focus on data link layer,and the physical layer introduces an custom-built IP——RocketIO to replace.when implemented,the Xilinx corporation's ISE development flow was adopted,the design tools included ISE, ModelSim,Synplify Pro,ChipScope etc.At last,through software simulation and on board testing,the results indicate that the max serial frequency reached 3.5GHz when the protocol in single channel,it satisfies the optical interconnected validate system.at the same time,the eye diagram,obtained from the RocketIO's high speed serial difference ports,is righ,this indicate that the customization of physical IP was success.