Embedded MPEG-4 Video Decoder

Sine MPEG-4,which has the capacity of dealing with multimedia under the condition of a variety of bandwidth,can solve the problems of multimedia storage and transmission,it becomes one of the most common multimedia compression standards in recent years.Embedded MPEG-4 video decoder requires a hardware platform with the features of high performance,low-power comsuption, and high integrative density.FPGA(Field Programmable Gate Array)and SoPC(System on Programmable Chip)technology meet this demand.And the research of MPEG-4 video decoder based on FPGA or SoPC has a lot of theoretical values and practical significance.We choose XILINX ML310 as our experimental platform to implement MPEG-4 video decoder in this disseration.A framework of video decoding for MPEG-4,which combines software and hardware platform,is proposed in the disserataiton.The framework consists of tow parts.The one is PowerPC405 hard core,as the core of the system,which is implemented for the decoding of MPEG-4 video.The other is LCD driver,which is implemented by using FPGA.We employ opb/plb bus to connect the two parts.During MPEG-4 decoding,the BRAM plays the role of data interchange station between video decoding and video playing.While PowerPC405 are storing the decoded data into the BRAM through opb / plb bus,LCD driver reads the decoded video data from BRAM and sends them to LCD for display.Through the optimization of software and hardware configuration,the embedded video decoder can achieve a frame rate of 17fps for MPEG-4 SP with a resolution of 320×240.Extensive experimental results show that the proposed framework works well in terms of subjective image quality for MPEG-4 SP of various AVI formats.