In order to improve the reliability of the power line communication, the design of error-correcting code is researched chiefly in this paper. Firstly, the noise and attenuation characteristics of power line channel are measured and analyzed. The channel noise and attenuation model are simulated by MATLAB. Secondly, based on the analysis of the traditional BCH coding and decoding algorithms, a fast method of BCH coding and decoding,which is suitable for ARM realization,is presented. Owing to the disadvantages of the block interleaver and random interleaver, a new random block interleaver design method is also presented. Then, according to power line channel simulation model and hardware realization, the BCH code pattern and interleaver depth are determined. Finally, the realization of BCH coding/decoding and interleaver algorithm on ARM chip are discussed in detail, moreover, the actual measurement results show that the project can greatly recude the bit-error-rate of power line channel. |