The Design And Simulation Of Complex Bandpass ΔΣ Modulator

Considerable research effort in the field of microelectronics pushes towards the realization of fully monolithic, chiefly digital, RF receivers—with the ultimate objective being the implementation of small, inexpensive, low-power communication devices that are robust, testable, and capable of handling multiple communications standards. It is the shortener of the analog domain in the circuit design that can help to realize the multiple communications standards. In other words, the shortener moves the digital domain towards the RF domain.This thesis proposes a complex bandpassΔΣmodulator, which is adapted to image reject mixed low-IF receiver architecture. It is based on strategic IF placement and the modern quadrature image reject mixers. The former offers the shortener of the analog domain in the circuit design, eliminating the dc offset and alleviating 1/f noise; the latter minishes the wastes of noise shaping. In other words, the complex bandpassΔΣmodulator is superior to the lowpassΔΣmodulator and the classic bandpassΔΣmodulator in the field of realizing RF receivers.A second-order, two-bit quantizer complex bandpassΔΣmodulator is proposed in the complex low-IF receiver project, according to the system performance. The designs of system, circuit and layout levels needed to realize the complexΔΣmodulators are explored. Simulink, an extension in MATLAB, is used to describe a system configuration. The circuits and the layouts operate in Cadence and are simulated by Spectre. The design is based on TSMC 0.18um CMOS. Clocked at 2.4 MHz with 1.8V power supply under 300k. The IC converts the narrow band 307.2 kHz I and Q inputs, attaining 90dB SNR in 25.6-kHz bandwidth. Power consumption is 1.4 mW.