Font Size: a A A

The Research On Dynamic Reconfiguration System And Its Bit-Width Management For Loop Computations

Posted on:2007-01-11Degree:MasterType:Thesis
Country:ChinaCandidate:W WangFull Text:PDF
GTID:2178360185965736Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
Recently, as the development of microelectronic and computer technology, the problem of dynamic reconfigurable system's design as well as its application are becoming a new hot issue in the study of international computer system. Reconfigurable computing is a new computing model between microprocessor computing and ASIC computing with both software system's flexibility and hardware system's high performance. Adopting dynamic reconfigurable technology can not only improve system performance but also reduce the need for core resources and power. This article stressed dynamic reconfigurable system's design method and its dynamic bit-width management method for loop computation.In the aspect of dynamic reconfigurable system's study, the article firstly discussed concepts and traits of dynamic reconfigurable computation as well as structure and characteristic of dynamic reconfiguration's realization with FPGA. Secondly, it discussed that with FPGA in Virtex of Xilinx, we can use JBits to develop design method for dynamic reconfigurable system, which including system's platform design, program model and detailed flow design. At last, through constructing a dynamic reconfigurable system for the realization of the multiply and accumulation loop computing, we can testify dynamic reconfigurable system's design method and its advantages, which are based upon JBits.On the other hand, regarding to bit-width management of loop computation in dynamical reconfigurable environment, the article provided theoretical analytical method for loop computing bit-width's variation, improved running analytical method for bit-width's variation and also brought forward and realized loop computation for dynamic bit-width management that based upon genetic algorithm. Moreover, the article combined all these parts to construct a dynamic bit-width management frame for loop computation in order to realize dynamic reconfigurable system's bit-width optimization to the above designed loop computation of multiply and accumulation.The article carried through experiment and results analysis to the above study, and the experiment's results indicate that the dynamic reconfigurable system's design method can play down system development complexity and accelerate its development. Furthermore, the dynamic bit-width management frame for loop computing that the article provided, especially the dynamic bit-width management...
Keywords/Search Tags:Dynamical reconfigurability, FPGA, JBits, Bit-width management, Genetic algorithm
PDF Full Text Request
Related items