Research And Realization On IC Test Vector Automatic Translation

With the very large-scale integrated circuits (VLSI) becoming more and more complex, the cost of IC test increases rapidly. The time and resource of test program development are two main factors in the test cost. But with the improvement of design and test technique, translating the test vector from the design to test system is becoming more and more difficult. So how to solve the difficulty efficiently is an important research direction.This dissertation studies the different test vector format languages and IC test program languages, introduces test development system architecture and components, discusses the key issues in practical application of test vector translation and gives the solutions. On this basis, we realize a test vector translation system. The contributions of the dissertation are listed as followings:1. Design and implementation of a universal test vector translation model. In the test program development, automatic translation of test vector is a very important and complex work from design to test. After analyzed the requirements, characters, key problems and the methods of test program development, we set up a virtual ATE translation model based on the similar-STIL. Using this model, we design and realize this test vector translation system based on the three-layer structure. This system includes application layer, application server layer, and data layer. Among the three layers, the first is a data layer that is the information center, the second is an application server layer that is made up of many function modules, and the top is an application layer that realizes the interface of waveform display and translating construction based on the workflow. Experimental results indicate that this system is easy to use and is efficient.2. Present a waveform data formats and compressing algorithms for test vector translation is provided. After analyzing the change of test requirement, we present a waveform data format based on the similar-STIL in test vector translation from EDA to ATE. Based on this waveform data format, a compressing and coding algorithm, which is to solve the large test vector, is developed. Experimental results show that this format is efficient in test vector translation and algorithm reduces the test data storage.3. Research on key techniques in test vector cyclization translation. In this paper, we present a proposed cyclization method that combines sampling method and waveform method. Using this method, the procedure is to need a timing set in every period. In order to reduce time in this procedure, we realize a fast cyclization algorithm based on the hash table. Experimental results show that this approach is efficient and automated in test vector translation.