Reliability Research Of High-speed Transmission Of Wideband Integrated Digital Optical Synchronous Network

Ethernet is the mainstream network of local area network and the network of industry at present. As a result of the protocol used CSMA/CD, it can't ensure the real-time quality anytime, and the shortcomings of complex of an integrated data transmission. In order to fundamentally overcome these shortcomings and have a very good link with the next generation networks (NGN). We hope to design a new network, it enables different business, different data structures, different transmission data rates, different signaling data link that can be transmitted in a network, it is WIDONet. The basic approach to address these many problems is to allot channel capacity and achieve the separation of transmission from operation and control.The network of WIDOSNet is mainly composed of concentrators and nodes. In the former design, the data was transmitted in a parallel mode. When the data transmission rate is over 1Gbps, many signal integrity problems will appear such as reflex, crosstalk, simultaneous switch noise and so on, so the parallel transmission mode is no longer a steady and economic way. How to solve the bottle-neck in the hardware design, this is the design of this paper: using the high-speed serial transmission mode instead of the original parallel transmission mode scheme.This thesis first gave a detailed explanation about the signal integrity problems during the design of high-speed digital circuit, and made analyze and simulation over the reflex and crosstalk. Based on the serial transmission mode, propose an improved design for the network node structure of WIDOSNet. In order to meet the needs of high speed and stability of the system, a method based on FPGA was provided, and the hardware circuit structure was designed.