Real-Time Face Detection Based On Adaboost Algorithm And EPGA Implementation

Face detection is a key technology in face information processing. It is used widely inautomatic face recognition, intelligent human-machine interaction, video conference and otherareas. Many face detection methods including knowledge, appearance, characteristics,template matching and Adaboost methods are raised. Because of the advantages in detectionspeed and high detection rate, Adaboost face detection algorithm is used widely in manyresearchs.Currently, it is used mostly software face detection method in computer, this methodhas disadvantages in real-time and can't meet the requirement of system in practicalengineering application.With the development of programmable logic device, we completeAdaboost face detection algorithm Use method of hardware architecture on FPGA, This paperdesign an face detection system of algorithm Adaboost . This article did some work for theminiaturization and real-time of face detection system.In this paper, the author studies Adaboost face detection algorithm, and designs facedetection system on FPGA development platform using method of hardware architecture.First, this paper introduces some common face detection algorithm and the Haarcharacteristics based on Adaboost face detection algorithm. Next, on the basis of AdaBoostalgorithm for face detection, using the characteristics of hardware implementation based onFPGA, the paper has improved traditional image pyramid zoom mechanism, and has designedimage scaling mechanism of parallel structure. Lastly,a complete inspection system isimplemented in SEED-FEM025 development platform that use XC4VSX25 FPGA as the corechip, which include effective video data collection, the configuration video coding, decodingchips of I2C bus controller design, AdaBoost face detection module hardware design andvideo display and verify design. In face detection, using the programmable chips structure ofFPGA design module, perfect parallel computing capacity, the line connection and parallelstructure, the paper has achieved the design of image scaling unit, integral unit, classifier unit, the detected result and merger unit.