With the rapid development of VLSI, more and more applications will need large-capacity, high-speed memory to meet its data storage needs. The current cost-effective DDRⅡ, DDRⅢmemory has been widely used. The IP core, as a controller, has flexible adaptability, high reliability and good reusability and will become the mainstream of memory controller design. The controller's functions will continuously develop and improve in applications in future.This article is based on the demand of"CE-3 surface target echo simulator"for in-depth study. STRATIXⅡFPGA logic control and DDRⅡcache are two cores of the"high-speed large-capacity data storage board". The designed board is up to 136GB in storage capacity, is up to 2.73GB/s in data transfer rate, and can carry out fast data exchange with computer through PCI. In addition, in order to achieve time-saving, high efficiency, high reliability and high flexibility, the"High Performance Controller"IP core is studied and realized as the controller of DDRⅡcache. The program is stable and the function is satisfactory. |