With the rapid development of IC technology, it is difficult for the feature size of device to diminish as Moore's Law. Strained silicon is of technological interest for its ability to increase charge carrier mobilities in MOSFETs and thereby improve circuit performance without requiring device scaling. Meanwhile, it is easy for the strained silicon technology to integrate into the standard bulk silicon process flow, which cuts down the cost for new equipments. As a result, it is significant to research the characteristic and the reliability of the strained silicon MOSFETs.This work reviews the physics of carrier mobility enhancement due to the strain, and introduces a number of approaches of forming strain.The emphasis of this thesis is on the establishment of thermal resistance model in biaxial-strained silicon MOS devices, and quantitative analysis of self-heating effect. Three factors are considered during the calculation of thermal resistance. Firstly, the peak position of heat generation rate appears in the drain end, away from the channel in the short, quasi-ballistic device. Secondly, neither the interface thermal resistance of the MOS structure nor the contact thermal resistance could be ignored in small scaled device. Thirdly, the thermal conductivity is relevant to the temperature, impurity concentration and the silicon layer thickness. Based on the model, several optimizations have been proposed, and been verified with ISE-TCAD software.Thin virtual substrate technology is a universally accepted method to suppress the self-heating effect. The strained silicon MOSFETs fabricated on thin SiGe virtual substrate are investigated, including the DC/AC output characteristics, and the results prove that this kind of devices are capable to reduce self-heating effect, and meanwhile to suppress the gate leakage current. |