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Design Of The Doppler Frequency Measurement System Based On FPGA

Posted on:2008-11-22Degree:MasterType:Thesis
Country:ChinaCandidate:H F WangFull Text:PDF
GTID:2132360215959355Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Doppler log is a precise instrument, which is used to measure ship velocity and calculate its voyage, according to the theory of Doppler Effect of sound wave in the water. It is an important part of the devices that are used to navigate. The measurement of Doppler frequency is the core problem of the Doppler log. So this thesis put forward a new frequency measurement of Doppler scheme which based on FPGA. This scheme has many characteristics such as anti-jamming and fast computed speed and so on. In this thesis, we mainly researched on the design and implementation of the frequency measurement scheme of this system.The main tasks of this thesis include two parts. One is the design and debugging of the hardware of the Doppler Frequency Measurement System based on FPGA. Another one is on the design and implementation of the frequency measurement and other interface programs by using VHDL through the research on the frequency arithmetic. The correctness of this system is tested through the software simulation.The hardware design of the frequency measurement system is one of the main parts of this thesis, which is also the core part of the Doppler Frequency Measurement System based on FPGA. As the main processor of the whole system, the FPGA accomplishes all the digital signal processing and the control of the interface circuit. According to the programmable logic resources inside the slice and the exterior I/O resources, the system expanded abundant communication -interface circuit(UART, USB, Ethernet) and the vision circuit(the LCD and LED), which making the system easy to carry on the data commutation and control with PC machine.The software implementation of the system is another important part of this thesis. By the research of the frequency measurement arithmetic, this thesis accomplishes the over-zero-examination arithmetic and the FFT arithmetic using VHDL language. At the same time, AGC (automatic gain control) and the data collection and the communication with PC through RS232 are implemented too.
Keywords/Search Tags:Doppler, frequency estimation, FPGA, VHDL
PDF Full Text Request
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