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Investigation Of Intrinsic Gettering Process Based On Rapid Thermal Process In CMOS Integrate Circuit Process Flow

Posted on:2007-12-03Degree:MasterType:Thesis
Country:ChinaCandidate:Q MaFull Text:PDF
GTID:2121360182473022Subject:Materials Physics and Chemistry
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The intrinsic gettering ability of Czochralski (CZ) silicon wafers is significant for the device yield. Using the traditional annealing process of Lo-Hi-Lo the intrinsic gettering structure of silicon can be obtained, but this kind of anneal is not fit for the low-budget trend of integrate circuit process. Resently, the novel "intrinsic gettering" process based on the theory of rapid thermal process (RTP) cut down the annealing time largely. However, its budget is still large. In this dissertation, the main researching purpose is to integrate the basing RTP intrinsic gettering process into CMOS integrated circurit process for formatting intrinsic gettering structure in Czochralski silicon with low thermal budget. In experiment, we chose classic high-budget and low-budget CMOS process and simulated some certain steps, such as thermal oxidation, well-in and RTP for eliminating the ion-implant damage. Through adjusted certain steps of these thermal steps reasonably, ideal intrinsic gettering structure was obtained in CZ silicon.In this dissertation, the nitrogen-doped, non nitrogen-doped and heavily arsenic-doped Czochralski silicon wafers have been investigated. Listed below are the main results obtained. 一,Investigation of intrinsic gettering structure for Czochralski silicon wafersubjected to low-budaget CMOS process flow (≈ 12 hours )If there were not any adjustion on the low-budaget CMOS process flow, therewere not any BMD formatted in the bulk of nitrogen-doped and non nitrogen-dopedCzochralski silicon wafer. The main reason is that the annealing time is very short(≈12 hours) and the grow-in oxygen precipitations in Czochralski siliconwafer can not grow enough. So we can not observe any BMD in silicon bulk.Adjusting the temperature of RTP for eliminating the ion-implant damages to 1250℃, the intrinsic gettering structure emerged in the bulk of nitrogen-doped andnon nitrogen-doped Czochralski silicon wafer subjected to the adjusted CMOS thermal process. The width of denude zone was about 30 ^im and thedensity of BMD was high. Moreover, the denude zone of nitrogen-doped Czochralski silicon wafer was narrow than that of nitrogen-doped Czochralski silicon wafer. When RTP temperature was adjusted to 1250°C, a lot of vacancies were implanted into silicon wafers and stimulated the growth of grow-in oxygen precipitation.lt was found that it is the complexes of V2-OX and N2-V2-OX, composed by nitrogen pairs, oxide atoms and vacancies induced by RTP, that facilitate the nucleation of oxygen precipitation in silicon.The stimulative effect of nitrogen on oxygen precipitation results oxygen precipitation emerging even in near surface region of silicon, where the oxygen content is low. Then the denude zone in nitrogen-doped Czochralski silicon wafer become narrow.Adjusting the heat-up velocity of well drive-in step from 5°C/min to l°C/min besides improving the RTP temperature to 1250°C, the density of BMD in Czochralski silicon wafer subjected to the adjusted CMOS thermal process became higher than ever. Moreover, the width of denude zone was about 20\im. After cutting down the heat-up velocity of well drive-in step, the grow-in oxygen precipitations whose radius were larger than the critical nucleating radius of oxygen precipitation at 800°C would grow enough. If their radius reached the critical nucleating radius of oxygen precipitation at 1000°C, they would grow continuly at 1000°C-the highest temperature of well drive-in step. Meanwell, some little grow-in oxygen precipitations near silicon wafer surface could also grow up and result the narrow of denude zone.If utilizing RTP(1250°C) annealing silicon wafers previous CMOS CMOS process, the intrinsic gettering structure also emerged in both nitrogen-doped and non nitrogen-doped Czochralski silicon wafer subjected to the adjusted CMOS thermal process. Moreover, its effectivness analagied with that of megic denude zone process.The properties of oxygen precipitation in heavy-doped silicon during the CMOS low-budget thermal process have been investigated. It was found that only annealedby RTP at 1250°C, there is an excellent intrinsic gettering structure in heavy-doped silicon. The main reason is possible that because for a large number of RTP-induced vacancies, the critical radius of oxygen precipitation in heavy-doped silicon is reduced. Then the nucleation ability of oxygen precipitation is strengthened obviously.— ^ Investigation of intrinsic gettering structure for Czochralski silicon wafer subjected to high-budaget CMOS process flow ( ^40 hours ) If not adjusting the high-budaget CMOS process flow, the BMD densities in both nitrogen-doped and non nitrogen-doped Czochralski silicon wafer were low and simulated. The width of denude zone was 10|xm. Because there were many heat-up steps in annealing process and the annealing time of process was very long, the grow-in oxygen precipitations in nitrogen-doped and non nitrogen-doped Czochralski silicon wafer could grow enough and the oxygen content in silicon wafer reached the saturation value at the last step temperature(1000°C).Using RTP (1250°C, 50s) to replace the ordinary furnace anneal (1200"C, 2hours) of the process first step, the denude zone of silicon wafers reached about 20\im. RTP can eliminate thegrow-in oxygen precipitations in silicon wafers effectively and induced a novel density profile of vacancy in silicon which vacancy density increases from surface to bulk of silicon, so oxygen can not nucleate easily near the surface of silicon.
Keywords/Search Tags:Czochralski silicon, grow-in oxygen precipitation, DZ, RTP
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