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Improved SHEPWM Technology And Its Application In High-Power Grid-Connected Inverter

Posted on:2022-04-05Degree:DoctorType:Dissertation
Country:ChinaCandidate:J L ChengFull Text:PDF
GTID:1482306728463134Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the development of power systems and semiconductor devices,high-power grid-connected inverters have been widely used in the medium/high voltage field.To reduce system loss and relieve heat dissipation pressure,low frequency modulation technology is usually adopted.However,under the commonly used sinusoidal pulse width modulation(SPWM)and space vector pulse width modulation(SVPWM)technologies,the system output harmonic performance drops sharply with the decrease of the switching frequency,leading to large-volume passive filter.There is a big contradiction between switching frequency and system efficiency and volume in the field of high-power grid-connected inverters.Selective Harmonic Elimination Pulse Width Modulation(SHEPWM)technology has significant advantages of high harmonic performance at low switching frequencies,but it also has drawbacks such as slow dynamic response.Based on the widely used neutral point clamped(NPC)three-level topology,this paper studies the key technologies of SHEPWM applied in high-power grid-connected inverters.Firstly,the basic principles of traditional three-level SHEPWM algorithm are introduced and its steady-state performance advantage compared to SPWM is analyzed.The control algorithm and the realization method of SHEPWM under the synchronous rotating coordinate system are given.A detailed mathematical model including the modulation process is establised,and based on which the reason for the slow dynamic response of traditional SHEPWM is analyzed.Then,an improved SHEPWM strategy in which the switching angle data are updated at sampling frequency is proposed.The root locus method is used to cross-compare the dynamic and steady-state characteristics among the improved SHEPWM,traditional SHEPWM,and SPWM.It is proved that the improved SHEPWM has better dynamic response over traditional SHE and better steady state performance over SPWM.Secondly,the mechanism of the occurrence of non-zero-sequence,tripplen,odd harmonics under unbalanced grid is analyzed.Under different asymmetry degree,negative sequence phase angle,and modulation ratio,the distribution of non-zero-sequence triplen harmonics is studied.An improved SHEPWM modulation and control method suitable for asymmetric power grid conditions are proposed,and a modified instantaneous symmetrical component method is used to realize the decoupling of positive and negative sequence components.Considering the background voltage harmonics that may appear in a distorted grid,a design method of the LCL filter with negative resonance peak point conviguration is proposed to suppress the 5th and 7thbackground voltage harmonics.Thirdly,the mathematical model of the dead zone effect under SHEPWM modulation is established.The quantitative relationship between the dead time and the low-order harmonics is given.The influence of the dead zone effect under different working conditions is also evaluated.An open-loop dead zone compensation method by inserting a margin time is proposed,which is easy to implement in engineering applications.Further,in order to reduce the influence of uncertain factors,a margin time self-adjusting method through specific sub-harmonic voltage feedback is proposed.Based on a detailed mathematical model,a cross-decoupling method is proposed to make the adaptive compensation algorithm suitable for any power factor angle,and the convergence of the algorithm is analyzed in detail.Finally,a controller hardware structure based on a dual-core DSP and a small-scale FPGA is designed to realize the improved SHEPWM algorithm proposed in this paper.All control and modulation processes are realized by dual-core DSP,while FPGA only implements the addtion of dead zone signals.Compared with the traditional hardware structure that implements SHEPWM modulation through FPGA,it simplifies the FPGA design process,reduces FPGA resource consumption,and eliminates the frequency and phase errors caused by the communicaiton.Based on the proposed hardware structure,the influence of sampling error on steady-state performance is analyzed,and the basis for the selection of sampling frequency is given.The switching angle data storage method is designed in detail,and the influence of the modulation ratio step length and the switching angle data accuracy on the performance of the SHEPWM algorithm is analyzed,and the storage space consumption is reduced.
Keywords/Search Tags:high-power grid-connected inverter, selective harmonic elimination, dynamic response, steady-state performance, unbalanced grid, adaptive dead zone compensation
PDF Full Text Request
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