Infrared detector arrays: Electronic interface analysis, design, and modeling

Advances in infrared (IR) detector technology coupled with advances in analog Si CMOS technology have resulted in on-focal-plane hybrid integration of high performance Si readout circuitry with high density IR detector arrays made from a variety of low bandgap semiconductor materials. This dissertation focuses on characterizations or several linear IR photodiode arrays employing on-focal-plane Si CMOS readout circuitry. Significant performance improvements are reported using buffered capacitive transimpedance amplifiers (CTIA) to interconnect with photodiode arrays instead of reverse-biased, self-integrating techniques. Near zero volt detector bias is maintained by buffered interfacing techniques which greatly reduce dark currents and improve linearity.;Key performance issues are CMOS op amp input offset voltage and input voltage noise. Emphasis has been placed on noise analysis as improved modeling has revealed dominating noise sources to be preamp white noise and preamp 1/f noise. Preamp white noise dominates at shorter exposure times while preamp 1/f noise dominates at longer exposure times on InGaAs arrays evaluated. Under small detector bias conditions (...