| Limited resource availability in portable environment, requires portable multimedia systems to be efficient. In addition, these systems are expected to be scalable to future gigascale VLSI technology. The on-chip interconnect technology projections given by the National Technology Roadmap for Semiconductors (NTRS) imposes high communication cost, making current complex, centralized architectures unsuitable. With advances in VLSI technology and adequate architectural design choices supercomputing portable multimedia systems are realizable. This dissertation research focuses on providing architectural design choices for building efficient, scalable portable multimedia architectures. A new class of parallel architectures capable of exploiting instruction-level, control-level and data-level parallelism is developed. An efficient SIMD instruction broadcasting scheme with short-wires is also presented. Results show this class of architectures achieves up to 42% better area efficiency than a system that does data parallelism alone (SIMD). The use of short-wire instruction broadcast boasts system performance by up to 6.4 times when compared to difficult to scale global instruction broadcast. |
