Volume grating coupler-based optical interconnect technologies for polylithic gigascale integration

The concept of polylithic integration of electrical and optical interconnect technologies is presented. The use of a two-grating, or grating-to-grating, coupling path for board-to-chip coupling of optical signals is proposed for fiber-to-the-chip and intra-chip optical clock distribution applications. An estimate for the increase in electrical I/O and substrate-level electrical interconnect layers required for a 40 Tb/s fiber-to-the-chip communication system using grating-to-grating board-to-chip coupling of optical signals is provided. An estimate of the ITRS technology generation within which alternate methods of intra-chip clock distribution are required is identified, and the strengths and weaknesses associated with different methods of optical clock distribution are summarized. A partition length between and routing area associated with on-chip optical waveguides and board-level electrical exterconnects is provided for signal distribution in gigascale microprocessors.; In addition, Avatrel 2190P is investigated as a candidate material for the creation of integrated optical waveguides and power splitters. Low-decomposition-temperature sacrificial polymers are used to construct chip-length embedded air-clad optical waveguides for on-chip signal and clock distribution. A wafer-level batch package exhibiting compatible electrical and optical I/O interconnects is presented, where two-material index-defined and air-clad waveguide/grating channels are fabricated and tested. Finally, grating-to-grating coupling over a quasi-free space coupling path is demonstrated and quantified for the first time to illustrate the feasibility of board-to-chip optical I/O in gigascale microprocessor systems.