Programmable analog techniques for precision analog circuits, low-power signal processing and on-chip learning

The transistor is one of the key components that has made possible the plethora of electronic gadgets that one finds in use today. Investigating the possibilities of providing an additional degree of design freedom to this fundamental element is the subject of this research. This is achieved using a floating-gate transistor that provides programmability in circuits and thereby positively impacts a wide range of applications from traditional analog circuits to systems that learn on-chip.; Using a programmable analog framework, precision analog circuits have been developed that are compact and power efficient. Floating-gate transistors form an inherent part of the circuits of interest. Candidate circuits demonstrated include programmable references and low-offset amplifiers. Lack of programmability in analog circuits has been the biggest stumbling block in implementing key signal processing operations such as multiplication and addition in an area and power efficient manner in the analog domain. Using floating-gate transistors, an analog current-mode multiply-accumulate unit has been developed. Experimental results show significant power savings when compared with digital implementations.; Programmable analog sets the stage for on-chip learning and adaptation as well. An analog architecture has been presented that implements an adaptive filter with on-chip learning of the necessary weights such that the error between the system output and a target signal is minimized. The fundamental building block of this system is a floating-gate synapse that modifies the charge stored on its floating-gate using a least-mean-square learning algorithm. A simulation model for the floating-gate synapse has also been developed in order to help design large-scale adaptive filters. In summary, this research involves developing techniques for improving analog circuit performance and in developing power-efficient circuits for signal processing and on-chip learning.