| GaAs is regarded as an alternative channel material for continuous development of Si CMOS technology because of its higher electron mobility than that of Si. GaN is regarded as an excellent channel material for high-temperature, high-power, and high-frequency electronic devices, because of its high saturation velocity, high band-gap energy, and high breakdown strength.; To realize CMOS digital circuits' advantages, enhancement-mode GaAs MISFET (Metal Insulator Semiconductor Field Effect Transistor) is preferred. This work focuses on the key processing/device issues in realizing GaAs enhancement-mode MISFETs. MISFETs made of other alternative channel materials (InAs, Ge, InGaAs) may run into excessive off-state leakage currents problem, due to their smaller band-gap energies than that of Si. This work details the simulation results of the off-state leakage currents from MISFETs made with alternative channel materials. This work also covers our study of the properties of some gate dielectrics deposited on GaN.; During process optimization of (MAD) Si3N4/GaAs capacitors, the GaAs surface pre-treatment condition, dielectric deposition condition, and annealing condition have been found to affect the final capacitor characteristics. In particular, at 200°C, an in-situ forming gas plasma pre-treatment has been found to be more effective in lowering interface-state density than its room temperature counterpart. Unpinned GaAs surface and surface inversion, necessary characteristics for an enhancement-mode MISFET, are demonstrated by AC-conductance, Quasi-static C-V, hysteresis C-V, and multi-frequency C-V.; During the development of the enhancement-mode GaAs MISFET, using the conventional non-self-aligned gate-last approach, we have achieved pn junction with low reverse leakage current and low series resistance, and GaAs channel that is well preserved after the whole transistor process. We have found a high density of defects at the gate-to-drain overlap region, which trap free carriers, so that we couldn't observe gate modulation of drain current. By developing a self-aligned gate-first approach, we have eliminated the excessive gate-to-drain overlap, and successfully demonstrated the first enhancement-mode GaAs MISFET with ex-situ gate dielectric in the literature.; Based on the off-state leakage current simulation results, we have found that the bulk band-to-band tunneling and the gate-induced-drain-leakage (GIDL) currents for InGaAs, Ge, and InAs are both higher than the ITRS specifications. By reducing the operating voltage and/or reducing the bulk/channel doping concentrations, they can be lowered below the specifications.; We have found high defect densities in the gate dielectrics of p-type GaN MOS capacitors, and we propose that excessive Mg induced GaN surface defects and surface roughness could be responsible for these results. |
