| Recently,for integrated circuit design and device preparation technology in the intelligent system,computer-aided simulation has become an indispensable tool to allow designers to predict and optimize performances of circuits and devices.With the developments of the preparation technology,polysilicon transistors have demonstrated great potential applications in active matrix organic light-emitting diode displays,memories,and sensors,etc.Integrated circuits based on polysilicon thin-film transistors have a great improvement on integration and complexity.In this case,to improve the electrical charateristics of the semiconductor devices,non-classical poly-Si nanowire transistors are proposed to control short channel effects and make intrinsic size of transistors decrease according to the scaling law.On the one hand,in order to optimize the electrical characteristics of polysilicon nanowires,the corresponding compact model is needed to be applied into device process technology simulators.On the other hand,a compact model of polysilicon nanowire transistors is also necessary for circuit simulators to complete circuit designment,predict performance of circuit,verify the design intent,and enhance the end product yield rate.Serving as a link between preparation technology and circuit design,a compact model of polysilicon nanowires can help us to study electrical characteristics and physical mechanism of polysilicon nanowire transistors.Therefore,a physics-based compact model for polysilicon nanowire transistors is extremely essential and urgently necessary for integrated circuit design and device preparation technology in the intelligent system.In this paper,based on the physical mechanism of polysilicon nanowire transistors including single-date SOI,double-gate,triple-gate,and surrounding-gate structures,a compact model of polysilicon nanowires suitable for circuit designment and device preparation simulators is propsed.Firstly,an analytical drain current model of single-gate polysilicon SOI transistors is proposed.In the intensive research on polysilicon nanowire transistors,single-gate polysilicon SOI transistors have become a foundation of other multi-gate poly-Si nanowire transistors.(1)Based on the partly-depletion assumption,the 1-D Poisson equation including trap density and doping concentration is presented,and then the implicit eqution about surface potential is proposed,which is a transcendental function.It is noted that the transcendental function cannot be solved analytically.However,accurate and analytical solution of surface potential in single-gate polysilicon SOI transistors can be obtained by some mathematical methods such as Lambert W function without using the iterative procedure.The developed algorithm is computationally efficient for circuit simulators by avoiding the iterative calculation.The absolute error between surface potential calculation and numerical results is in the range of 10-5V.(2)Based on the surface potential,through the charge sheet model,a complete and unified drain current model is proposed,which is valid for all operating regimes when the gate-to-source voltage is larger than the flat-band voltage,including the subthreshold and strong inversion region.The proposed drain current model is analytical and its transfer region is without any smooth function.(3)In the expression of the effective mobility,drain induced barrier lowing(DIBL)effect and scattering are taken into account.In addition,the velocity saturation is reflected by the effective drain-to-source voltage.(4)Comparisons between model and experimental results of transfer and output characteristic curves with different channel lengths ensure the accuracy and validity of the model.Secondly,an analytical drain current model of double-gate polysilicon nanowire transistors is proposed.Since double-gate nanowire transistors are controlled by two gates and the thickness of channel is small,the film is depleted fully and the surface potential and the potential in the middle of the film couple with each other.In this case,implicit equation between the surface potential and the potential in the middle of the film is proposed by one-dimensional Poisson's equation accounting for the trap density in exponent distribution and doping concentration.This is a key problem for model of triple-gate and surrounding-gate polysilicon nanowire transistors.(1)Through the regional approach,using Lambert W function,the surface potential and the potential in the middle of the film have been derived in subthreshold regime 1,subthreshold regime 2,and strong inversion regime,respectively.Also,smoothing function is used to combine the results of the surface potential and the potential in the middle of the film in a unified form.Comparisons with numerical results verified the accuracy of the proposed calculation scheme.Descriptions about the effects on surface potential from the channel voltage,the trap density,and the doping concentration are given in this chapter.(2)Through the effective charge density approach,the surface potential and the potential in the middle of the films are derived explicitly from Poisson's equation without the regional approximation.These inherent single-piece electric potentials make the model possess clearer physics meaning and higher accuracy,particular in the transition region.(3)Furthermore,considering volume inversion in the channel,an analytical drain current model has been developed from the Pao-Sah integral rather than the charge sheet model.(4)The drain current model is validated by experimental data from long to short doped channels.Thirdly,an analytical drain current model of triple-gate polysilicon nanowire transistors is proposed.Triple-gate nanowire transistors are controlled by three gates,which are better than double-gate nanowire transistors in electrical characteristics.In the rectangular coordinate system,the 3-D Poisson equation of single-gate polysilicon SOI and double-gate nanowire transistors can be simplified as the 1-D Poisson equation based on the gradual channel assumption and symmetric gate structure.However,for triple-gate polysilicon nanowire transistors,since the gate structure is asymmetrical,the 3-D Poisson eqution only can be simplified as the 2-D Poisson eqution.This is a new challenge for solving surface potential without numerical iteration.(1)Using superposition principle,triple-gate polysilicon nanowire transistors can be split into two parts,i.e.,single-gatelike polysilicon SOI transistors and double-gate-like polysilicon nanowire transistors.Therefore,the 2-D Poissson equation can be split into two 1-D Poisson eqations along x and y,respectively.Based on the regional approach,using Lambert W function and the intermediate approach,the above 1-D Poisson equations can be solved without numerical iteration.And then,the results of the algorithm are added,the surface potential and the potential of the middle of the film are solved.It is noted that the results of the surface potential algorithm can give a reasonable explanation about corner effect.(2)Furthermore,considering volume inversion in the channel,an analytical drain current model has been developed from the Pao-Sah integral rather than the charge sheet model.(3)The drain current model is validated by experimental data.Fourthly,an analytical drain current model of surrounding-gate polysilicon nanowires is proposed.Since channel is surrounded by gate,surrounding-gate polysilicon nanowire transistors have the best ability to control the short channel effects.However,compared with single-gate polysilicon SOI,double-gate and triple-gate polysilicon nanowire transistors,the gate structure of surrounding-gate polysilicon nanowire transistors is symmetric in the cylindrical coordinate system.It is difficult to analytically solve surface potential.(1)Based on an intermediate parameter,surface potential is derived analytically from the one-dimensional Poisson's equation and satisfies the corresponding boundary conditions.Therefore,the surface potential and the potential in the middle of the film are described as functions of this intermediate parameter.Furthermore,the drain currents in the different operational regions are analytically integrated.Our model results show a good agreement with numerical results and experimental data.The use of the explicit surface potential solution results in an easy implementation into circuit simulators.In conclusion,the DC compact model of polysilicon nanowire transistors is based on the physical mechanism and the algorithm of analytically solving surface potential.The proposed DC compact model of polysilicon nanowire transistors is suitable for circuit designment and device preparation simulators of intelligent system.According to the Poisson eqution,the coupled relationship between surface potential and potential in the middle of the film is proposed.And then,the algorithm of analytically solving surface potential is presented.Considering volume inversion in the channel,drain current is analytically solved from the Pao-Sah integral.Finally,the DC compact model is validated by numerical iteration,2-D numerical simulation,and experimental data. |
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