Transient Current Characteristics Of Paralleled Chips In High Voltage High Power Press Pack IGBT

High voltage high power press pack IGBT is the key components in converter valve and DC circuit breaker,which has become the critical factors in flexible DC transmission power grid along with the development of renewable energies.Developing the domestic high voltage high power press pack IGBT is of great significance for reducing the cost of power grid construction and improving the energy consumption of clean energy.Considering the structure characteristics of press pack IGBT,a dynamic test platform for high voltage high power press pack IGBT is developed.Based on the test platform,the influence of packaging parasitic inductance on transient characteristics of paralleled IGBT chips is analyzed,and then,the package structure optimization methods are proposed to improve the consistency of the current distribution.Paralleled IGBT chips cause plasma extraction transit time oscillation in the tail current phase,which affects IGBTs' reliability.By analyzing the small signal characteristics of space charge region,a new method is proposed to suppress the oscillation,which greatly improves the reliability of press pack IGBT.A special designed dynamic characteristic test platform,which ensures that the mechanical pressure consistent on the surface of press pack IGBT,is built to investigate the transient current distribution of paralleled IGBT chips,greatly promoted the development of the packaging and testing progress.Furthermore,a new method by using turn-on and turn-off waveforms simultaneous is proposed to extract the stray inductance of test platform accurately,which offers the basis for providing the authoritative IGBT device data sheet.Based on simulation analysis and experimental research,equivalent circuit model of paralleled copper emitter pillars in press pack IGBT is built to investigate the influence of packaging parasitic inductance on transient current distribution of paralleled chips.Concepts of overshot coefficient and non-uniformity factor of chips' current are proposed to characterize the current distributions.Then the structure is optimized based on the new concepts;simulation results prove that new structure shows better current distribution.Furthermore,a new structure with circle arrangement of copper emitter pillars is proposed,simulation analysis indicates that the new packaging structure proved the current distribution greatly.By considering the symmetrical layout of emitter copper pillars,an equivalent circuit model is built to study the influence of asymmetrical drive circuit parameters on turn-on transient current distribution of paralleled IGBT chips.Impedance in each IGBT's drive circuit is measured experimentally,turn-on transient current distribution is analyzed by simulation,and experimental measurements verified the simulation results.Combined with the above analysis,a new structure with double pin and two layer PCB board is proposed,simulation results shows that the turn-on transient current of paralleled IGBT chips is great consistent.In the tail phase of IGBT turn off process,the carrier causes space charge effect when passing through the space charge region,which eventually causes plasma extraction transit time oscillation.Small signal characteristics of space charge region is analyzed in this paper,which reveals the relationship PETT oscillation and packaging parasitic inductance and testing voltage.Based on theoretical analysis,a new method is proposed to suppress the oscillation of PETT oscillation;the experimental results demonstrate the effectiveness of the method.In this paper,the study of the transient characteristics of the parallel IGBT chip facilitates the understanding of the transient current sharing characteristics and the high frequency PETT oscillation of the parallel IGBT chips,which can provide reference for the higher current level device design.