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Research On Key Technologies Of Machine Vision Based Positioning For Semiconductor Chip Packaging

Posted on:2017-08-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:B Y ZhangFull Text:PDF
GTID:1318330482994442Subject:Mechanical and electrical engineering
Abstract/Summary:PDF Full Text Request
Machine-vision-based positioning is one of the key technologies to pick and transfer chips precisely in semiconductor packaging process. In recent years, some elongated chips with sparse textures and some ultra thin chips with high level of integration put forward new demands to the existing packaging technologies. For the purpose of solving these new problems in chip packaging, three novel algorithms, a nonlinear camera calibration method with hierarchical-teaching-learning-based optimization algorithm, a region-based normalized cross correlation algorithm, a spatial-constraint-based feature point matching algorithm are proposed in this dissertation. The main research effort and contributions of the presented dissertation are introduced as follows:Firstly, a nonlinear camera calibration method with hierarchical-teaching-learning-based optimization algorithm (HTLBO) is proposed. The HTLBO is a significant improvement over teaching-learning-based optimization algorithm by bringing in a new concept of "headmaster". When the HTLBO algorithm is applied in nonlinear camera calibration, it can avoid the local optimal solutions of internal camera parameters, external camera parameters and distortion parameters. The algorithm improves the precisions of nonlinear camera calibration and chip positioning in packaging process.Secondly, a region-based normalized cross correlation (RBNCC) algorithm is proposed. To position elongated chips with small amounts of textures effectively, the RBNCC algorithm uses a signal function to separate the influences of the chip and the background pixel information. The bounding box of the chip is employed to rapidly estimate the region of interest of a chip in a target image. This strategy shortens the search time and makes sense for improving the production efficiency in chip packaging process.Thirdly, a spatial-constraint-based feature point matching (SCFP) algorithm is proposed. Traditional feature point matching methods are robust to the pose changes of a single chip, but they are not effective for positioning multiple chip instances in a single image. SCFP algorithm solves this problem by using both local information and the spatial topological relationship between feature points to divide the feature points among different chip instances. To guide the pick-up head picks up ultra thin chips accurately, we integrate the SCFP algorithm with camera calibration method to obtain the 3D pose of each chip in the world coordinate system.Fourthly, in order to meet the urgent needs of the production efficiency, parallel computing technique is adopted to speed up the RBNCC and SCFP algorithm respectively. Every step of these two algorithms is analyzed, data-intensive work is calculated in GPU and process control work is assigned to CPU.Lastly, an image processing library MV1.0 with independent intellectual property is constructed. The three proposed algorithms are integrated to it. A friendly graphical user interface is designed to help developers use the library conveniently. The three proposed algorithms are applied in typical semiconductor packaging equipment and can be widely used in practice.
Keywords/Search Tags:Chip packaging, Machine-vision-based positioning, Camera calibration, Intensity-based matching, Feature-point-based matching, Parallel computing
PDF Full Text Request
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