Design And Implementation Of Asynchronous Control Circuits

The past five decades have been dominated by the synchronous circuit with global clock. Recently, heightened interest in low power consumption and clock skew has encouraged the use of asynchronous techniques as an alternative approach to circuit design.This thesis details our developments in the design methodology of large scale burst mode asynchronous control circuits and the implementation of self-checking speed-independent circuits. Primary innovative works in this paper can be summarized as follows:1. We developed an automated methodology for decomposing a burst mode asynchronous controller into smaller sub-controllers, where each resulting sub-controller is activated on a communication channel by its parent. This proposed approach consists of a new decomposition method, inter-controller burst mode state machines and inter-controller communication protocol. Furthermore, only a moderate amount of auxiliary hardware is required.2. We proposed an approach for the implementation of burst mode state machines, which, by defining a one-to-one mapping between state diagram and circuit implementation, removes the need for race and hazard circuit analysis. It allows for regular, fast, multiple-input-change, non-fundamental mode asynchronous control circuits.3. We put forward a systematic design technique for burst mode asynchronous control circuits. Firstly, we decompose an burst mode state machine into smaller sub-machines and design the inter-controller burst mode state machines. Secondly, we implement burst mode sub-controllers by the logic synthesis method and effectuate inter-controllers with the direct mapping approach. Lastly, we design the primary output generators and compose all the circuit modules. This technique enables very large scale asynchronous control circuits with seemly time.4. We expound an effective means for the designing of fully testable asynchronous controllers, making use of the self-checking property. We show an improved, fail- stop David Cell, describe a way of designing self-checking asynchronous control circuits by the direct mapping technique, and propose the testing method for single stuck-at faults. The result shows that self-checking counterpart can be tested at normal operation speed and the area overhead is acceptable.