Research On Graphene Field-effect Transistors And Radio Frequency Integrated Circuits

Graphene, as a “miracle material”, is of great interest in recent years. This thesis is a systematic study on graphene’s applicaton in RF electronics.In the first beginning, two significant factors in graphene field-effect transistors(GFETs), the carrier mobility and gate dielectrics, were investigated. Several kinds of self-assembled monolayers(SAMs) were used to modify the graphene interface, most of which improved the graphene’s carrier mobility. Phenyl-terminated SAM, in particular, increased the carrier mobility by more than three times. The graphene channel was suspended in part in a new GFET design, which generated a carrier mobility of more than 40000 cm2v-1s-1. Buried gate structures were then studied to avoid depositing gate dielectrics on the inert surface of graphene. Gate dielectric with thickness 3 nm in EOT was achieved.Afterwards, GFETs with gate lengths from 200 nm to 1.5 μm were fabricated. f T=33.7 GHz and fmax=36.5 GHz were achieved. fmax is among the highest in literature, and is attributed to the low resistance of the buried gate. Based on these results, a small-signal model was built as a feedback to the device fabcrication processes. Furthermore, a compressive large-signal model was established and implemented in Verilog-A language. The large-signal model provides convenience in circuit design.As for circuit integration, we proposed a “passive-first-active-last” integration scheme, as what we call “inverted process”. CMOS back-end-of-line(BEOL)technology was used to fabricate on-chip passive components, interconnects and buried gate structures. Then, graphene was transferred followed by GFET fabrication processes. In this method, graphene was kept away from BEOL process contaminations, and CMOS techniques were utilized to maximum extend.Based on the inverted process and the large-signal device model, we proposed three types of graphene circuits. 1) Graphene frequency multiplier. The circuit integrated a GFET and an on-chip spiral inductor. It achieved a conversion gain of-26 dB and a bandwidth of 4 GHz, and is listed as one of the best works in graphene frequency multipliers. 2) Mixer. Both the single-GFET resistive mixer and the cross-coupled four-GFET double-balanced mixer were fabricated. The latter achieved third-order intercept(IIP3)up to 21 dBm and generated a pure output spectrum. The integration level is among the highest in literature. The chip integrated four GFETs, four on-chip inductors and four MIM capacitors. 3) Graphene distributed amplifier. Transmission lines were employed to combine multiple GFETs in phase to generated desirable gains. Both the large-signal model and S-paremeter measurement results were used in the circuit simulations. This work provides a constructive solution to overcome graphene’s longstanding weakness in generating gains.